In the majority of systems, power consumption of a CPU and a main memory accounts for approximately 40% of total power consumption of the whole system. It is therefore vital to scheme how much electric power of the CPU and the main memory is saved in terms of realizing power saving of the whole system. Such being the case, a variety of power saving technologies for the CPUs and the main memories have been proposed. For example, the schemes are a core sleep for reducing the power consumption by restraining clocks of a CPU core, a partial array self refresh for reducing the power consumption by supplying only an electric current sufficient for only banks required to retain data on an SDRAM while cutting off the supply of electricity to remaining banks, and so on.
Each of the conventional power saving technologies for the CPUs and the main memories is directed to a single-core CPU. Hence, any proposals which utilize advantages of a multicore CPU are not yet made, and there is no alternative but to apply respectively these power saving technologies on a core-by-core basis in the multicore CPU.
Thus, in the case of applying a partial array self refresh technology for the single-core CPU directly to the multicore CPU, it follows that the same transition time is required absolutely in the same procedures as in the case of applying the power saving technology to the single-core CPU, and hence there is nothing more than acquiring a decrease in power consumption quantity to the same degree as in the case of the single-core CPU.